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Wednesday, February 4, 2015

MOS Circuits

Q1: What states can a MOS be in?
A1: A NMOS may be in:

  1. Cutoff
    • v_{OV}\leq 0
    • i_D=0
  2. Saturation
    • v_{OV}\geq 0 and v_{DS}\geq v_{OV}
    • i_D=0.5\mu_nC_{ox}\frac{W}{L}v_{OV}^2(1+\lambda v_{DS})
  3. Triode
    • v_{OV}\geq 0 and v_{DS}\leq v_{OV}
    • i_D=0.5\mu_nC_{ox}\frac{W}{L}(2v_{OV}v_{DS}- v_{DS}^2)
A couple of notes:
  • v_{OV}=v_{GS}-v_{tn} where v_{OV} is the overdrive voltage and v_{tn} is the threshold voltage associated with the NMOS
  • The expressions for i_D in saturation and triode both contain the pre-factor 0.5\mu_nC_{ox}\frac{W}{L} 
    • \mu_n is the negative charge carrier effective mobility
    • C_{ox} is gate-oxide capacitance per unit area
    • W is the gate width
    • L is the gate length
  • The expression for i_D in saturation contains the channel-length modulation parameter \lambda
    • If channel-length modulation can be neglected, then \lambda=0
    • The channel-length modulation parameter is related to early voltage by: \lambda=\frac{1}{v_A}
    • The phenomenon of channel-length modulation in MOSFETs can be compared to Early effect in BJTs

For a PMOS:
  1. v_{OV}=v_{GS}-v_{tn}\to v_{OV}=v_{SG}-|v_{tp}|
  2. \mu_n \to \mu_p
  3. v_{DS}\to v_{SD}
  4. v_{GS}\to v_{SG}
Q2: How do I solve MOS circuits?
A2: For an NMOS circuit:
  1. Write the KVLs for v_{GS} and v_{DS}
  2. Assume cutoff by setting i_D=0. Check that you are in cutoff.
  3. Assume saturation. Check that v_{DS}\geq v_{OV}
  4. You're in triode mode. 
Note that the equations for i_D in saturation and triode mode are quadratic. Although you may find 2 roots, only keep the 1 that's valid for that particular state.

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